From 413eae5cb4d5fe78fc25258bf7b5e3b53740b1f9 Mon Sep 17 00:00:00 2001 From: xyc <jc_xiong@hotmail.com> Date: 星期三, 24 七月 2024 11:08:01 +0800 Subject: [PATCH] 1)新增仿真时模型及参数完整性检查 2)增加调用算法库后端接口 --- starter/src/main/resources/application.yml | 8 ++++++-- 1 files changed, 6 insertions(+), 2 deletions(-) diff --git a/starter/src/main/resources/application.yml b/starter/src/main/resources/application.yml index 52ff66e..e529845 100644 --- a/starter/src/main/resources/application.yml +++ b/starter/src/main/resources/application.yml @@ -4,7 +4,7 @@ uri-encoding: UTF-8 max-threads: 1000 min-spare-threads: 30 - port: 8050 + port: 8066 servlet: context-path: /test-project session: @@ -145,4 +145,8 @@ tokenTimeout: 60 # 鍗曚綅鍒嗛挓 - + reliaSimLib: + # 绠楁硶搴撳惎鍔ㄨ剼鏈紙鍏ㄨ矾寰勶級 + mainPy: D:/relia_sim/main.py + # 绠楁硶搴撲豢鐪熺粨鏋滃瓨鏀炬牴鐩綍 + resultHome: d:/relia_sim/sim_result -- Gitblit v1.9.1